5-pin (DPW) package image

SN74AUP1G126DPWR 現行

具有 3 態輸出的單路 0.8-V 至 3.6-V 低功耗緩衝器

現行 custom-reels 客製 可提供客製捲盤
open-in-new 檢視替代方案

定價

數量 價格
+

品質資訊

等級 Catalog
RoHS
REACH
引腳鍍層 / 焊球材質 NIPDAU
MSL 等級 / 迴焊峰值 Level-1-260C-UNLIM
品質、可靠性
及包裝資訊

內含資訊:

  • RoHS
  • REACH
  • 產品標記
  • 引腳鍍層 / 焊球材質
  • MSL 等級 / 迴焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中可靠性監測
檢視或下載
其他製造資訊

內含資訊:

  • 晶圓廠位置
  • 組裝地點
檢視

出口分類

*僅供參考

  • 美國 ECCN:EAR99

封裝資訊

封裝 | 引腳 X2SON (DPW) | 5
作業溫度範圍 (°C) -40 to 85
包裝數量 | 運送包裝 3,000 | LARGE T&R

SN74AUP1G126 的特色

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22−
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption
    (ICC = 0.9 µA Maximum)
  • Low Dynamic-Power Consumption
    (Cpd = 4 pF Typical at 3.3 V)
  • Low Input Capacitance (Ci = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Input-Disable Feature Allows Floating Input Conditions
  • Ioff Supports Partial-Power-Down Mode Operation
  • Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.6 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications

SN74AUP1G126 的說明

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family and Excellent Signal Integrity ).

This bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low. This device has the input-disable feature, which allows floating input signals.

To assure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

定價

數量 價格
+

包裝類型選項

您可依零件數量選擇不同包裝類型選項,包含完整捲盤、客製化捲盤、剪切捲帶、承載管或盤。

客製化捲盤是從一個捲盤上剪切下來的連續剪切捲帶,以維持批次和日期代碼可追溯性,依要求剪切至確切數量。依照業界標準,銅墊片會在剪切捲帶兩側連接 18 英吋前後導帶,以直接送至自動組裝機器。針對客製化捲盤訂單,TI 將酌收捲帶封裝費用。

剪切捲帶是從捲盤剪切下來的一段捲帶。TI 可能使用多條剪切捲帶或承載盒,以滿足訂單要求數量。

TI 常以盒裝或管裝、盤裝方式運送承載管裝置,視現有庫存而定。所有捲帶、管或樣本盒之封裝,皆符合公司內部靜電放電與防潮保護包裝要求。

進一步了解

可提供批次和日期代碼選擇

在購物車中加入數量,並開始結帳流程以檢視可用選項,從現有庫存中選擇批次或日期代碼。

進一步了解