封裝資訊
| 封裝 | 引腳 SOT-SC70 (DCK) | 5 |
| 作業溫度範圍 (°C) -55 to 125 |
| 包裝數量 | 運送包裝 3,000 | LARGE T&R |
SN74LVC1G17-EP 的特色
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of -55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Qualification Pedigree(1)
- Supports 5-V VCC Operation
- Max tpd of 4.6 ns at 3.3 V
- Low Power Consumption, 10 µA Max ICC
- ±24 mA Output Drive at 3.3 V
- Ioff Supports Partial Power Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
NanoStar, NanoFree are trademarks of Texas Instruments.
SN74LVC1G17-EP 的說明
This single Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT-) signals.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.