SN74LVT16543
- State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation
- Members of the Texas Instruments WidebusTM Family
- Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Support Unregulated Battery Operation Down to 2.7 V
- Typical VOLP (Output Ground Bounce)< 0.8 V at VCC = 3.3 V, TA = 25°C
- ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors
- Support Live Insertion
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- Flow-Through Architecture Optimizes PCB Layout
- Package Options Include Plastic 300-mil Shrink Small-Outline
(DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center
Spacings
Widebus is a trademark of Texas Instruments Incorporated.
The 'LVT16543 are 16-bit registered transceivers designed for
low-voltage (3.3-V) VCC operation, but with the capability
to provide a TTL interface to a 5-V system environment. These devices
can be used as two 8-bit transceivers or one 16-bit transceiver.
Separate latch-enable (
or
) and
output-enable (
or 
) inputs are provided for each
register to permit independent control in either direction of data
flow.
The A-to-B enable (
)
input must be low in order to enter data from A or to output data
from B. If is low and
is low, the
A-to-B latches are transparent; a subsequent low-to-high transition
of puts the A
latches in the storage mode. With and both low, the
3-state B outputs are active and reflect the data present at the
output of the A latches. Data flow from B to A is similar but
requires using the 
,, and inputs.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
driver.
The SN74LVT16543 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54LVT16543 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVT16543 is characterized for operation from -40°C to 85°C.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs datasheet (Rev. C) | 1995/7/1 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SSOP (DL) | 56 | Ultra Librarian |
| TSSOP (DGG) | 56 | Ultra Librarian |