ADC32RF45EVM ADC32RF45 evaluation module for dual-channel, 14-bit, 3-GSPS, RF-sampling ADC top board image

ADC32RF45EVM

ADC32RF45 evaluation module for dual-channel, 14-bit, 3-GSPS, RF-sampling ADC

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Features for the ADC32RF45EVM

 

  • Onboard clock generation, or external clocking supported with LMK04828 generating SYSREF
  • JESD204B data interface to simplify digital interface; compliant up to 12.3-Gbps lane rates
  • Onboard power management with TI

 

Description for the ADC32RF45EVM

The ADC32RF45 evaluation module (EVM) demonstrates the performance of a dual 3-GSPS 14-bit analog-to-digital conver (ADC) with the JESD204B interface. The EVM includes the ADC32RF45 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary voltages.

The input for each channel of the ADC is, by default, connected to a transformer input circuit, which can be connected to a 50-Ω single-ended signal source. The clock reference input is provided via a transformer input and can be connected to a 50-Ω single-ended clock source. An onboard LMK04828 can be used to generate the necessary JESD204B clocks. Configuration register access is provided through the onboard USB connection and a Windows®-based GUI. An industry-standard JESD204B pin assignment on an FMC connector allows direct connection to the TSW14J56 Capture Card, as well as many commercially available FPGA development platforms.

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