Packaging information
| Package | Pins SOIC (D) | 14 |
| Operating temperature range (°C) -40 to 125 |
| Package qty | Carrier 2,500 | LARGE T&R |
Features for the SN74AHC74
- Operating range 2V to 5.5V VCC
- Latch-up performance exceeds 250mA per JESD 17
- ESD protection exceeds JESD 22
- 2000V Human-Body Model (A114-A)
- 200V Machine Model (A115-A)
- 1000V Charged-Device Model (C101)
Description for the SN74AHC74
The SNx4AHC74 dual positive-edge-triggered devices are D-type flip-flops.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.