Features for the ADC3242EVM
- Single 1.8V supply simplify power requirements
- Serial LVDS interface simplify digital interface and layout requirements
- On chip Dither to improve SFDR
- On chip Chopper to improve 1/f noise
- Input clock buffer with 1/2/4 divider to simplify clocking
- Pin compatibility between 12 and 14 bit versions
- Supports multi-chip synchronization
Description for the ADC3242EVM
The ADC3242EVM Evaluation Module demonstrates the performance of a low power dual 50Msps 14 bit ADC. It includes the ADC3242 device and TI voltage regulators to provide the necessary voltages. The input for the ADC is by default connected to the transformer input which can be connected to a 50 ohm single ended signal source. The clock input is provided via a transformer input and can be connected to a 50 ohm single ended clock source. A SYSREF input is provided to allow complete system synchronization. Register access is provided through the on board USB connection and a GUI.