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20-Bit, 250-kSPS, 1-Ch SAR ADC with Internal VREF Buffer, Internal LDO and Enhanced SPI Interface


Package | PIN: VQFN (RGE) | 24
Temp: Q (-40 to 125)
Carrier: Cut Tape
Qty Price
1-9 $16.20
10-24 $15.06
25-99 $14.54
100-249 $12.70
250-499 $12.08
500-749 $11.12
750-999 $9.98
1000+ $9.95


  • Resolution: 20-Bits
  • High Sample Rate With No Latency Output:
    • ADS8900B: 1-MSPS
    • ADS8902B:500-kSPS
    • ADS8904B: 250-kSPS
  • Integrated LDO Enables Low-Power, Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 104.5-dB, THD: –125-dB
    • DNL: ±0.2-ppm,20-Bit No-Missing-Codes
    • INL:±1-ppm
  • Wide Input Range:
    • Unipolar Differential Input Range:±VREF
    • VREF Input Range: 2.5-V to5-V
  • Enhanced-SPI Digital Interface
    • Interface SCLK : 22-MHz at 1-MSPS.
    • Configurable Data Parity Output.
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

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Texas Instruments  ADS8904BRGER

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family ofpin-to-pin compatible, high-speed, single-channel, high-precision, 20-bitsuccessive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integratedreference buffer and integrated low-dropout regulator (LDO). The device family includes theADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer byusing TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput atlower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPIalso simplifies the host’s clocking-in of data there by making it ideal for applications involvingFPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC dataoutput. ADC data validation by the host, using parity bits, improves system reliability.