text.skipToContent text.skipToNavigation

CD74ACT74E ACTIVE

Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset

US ECCN: EAR99 US/Local Export Classification Number

Inventory: 2,972  
 

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow N/A for Pkg Type
Quality, reliability
& packaging information

Information included:

  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
View or download

Packaging information

Package | Pins Package qty | Carrier: Operating temperature range (°C)
PDIP (N) | 14 25 | TUBE
-55 to 125
Package | Pins PDIP (N) | 14
Package qty | Carrier: 25 | TUBE
Operating temperature range (°C) -55 to 125
View TI packaging information

Features for the CD74ACT74

  • Inputs Are TTL-Voltage Compatible
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

Description for the CD74ACT74

The ’ACT74 dual positive-edge-triggered devices are D-type flip-flops.

A low level at the preset (PRE)\ or clear (CLR)\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

Pricing


Qty Price (USD)
1-99 0.683
100-249 0.464
250-999 0.358
1,000+ 0.238