text.skipToContent text.skipToNavigation

CDCE18005RGZT ACTIVE

5/10 Outputs Clock Buffer with Divider

Inventory: 12,735
 

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow Level-3-260C-168 HR
Material content View
DPPM / MTBF / Fit rate View
Qualification summary View
Ongoing reliability monitoring View
Device marking View

Packaging information

Package | Pins Package qty | Carrier Operating temperature range (°C)
VQFN (RGZ) | 48 250 | SMALL T&R
-40 to 85
Package | Pins VQFN (RGZ) | 48
Package qty | Carrier 250 | SMALL T&R
Operating temperature range (°C) -40 to 85
View TI packaging information

Features for the CDCE18005

  • Universal Input Buffers That Accept LVPECL, LVDS, or LVCMOS Level Signaling
  • Fully Configurable Outputs Including Frequency, Output Format, and Output Skew
  • Output Multiplexer That Serves as a Clock Switch Between the Three Reference Inputs
    and the Outputs
  • Clock Generation Via AT-Cut Crystal
  • Integrated EEPROM Determines Device Configuration at Power-up
  • Low Additive Jitter Performance
  • Universal Output Blocks Support up to 5 Differential, 10 Single-ended, or
    Combinations of Differential or Single-ended:
    • Low Additive Jitter
    • Output Frequency up to 1.5 GHz
    • LVPECL, LVDS, LVCMOS, and Special High Output Swing Modes
    • Independent Output Dividers Support Divide Ratios from 1–80
    • Independent limited Coarse Skew Control on all Outputs
  • Flexible Inputs:
    • Two Universal Differential Inputs Accept Frequencies up to 1500 MHz (LVPECL),
      800 MHz (LVDS), or 250 MHz (LVCMOS).
    • One Auxiliary Input Accepts Crystal. Auxiliary Input Accepts Crystals in the Range of
      2 MHz–42 MHz
    • Clock Generator Mode Using Crystal Input.
  • Typical Power Consumption 1W at 3.3V
  • Offered in QFN-48 Package
  • ESD Protection Exceeds 2kV HBM
  • Industrial Temperature Range –40°C to 85°C

Description for the CDCE18005

The CDCE18005 is a high performance clock distributor featuring a high degree of configurability via a SPI interface, and programmable start up modes determined by on-chip EEPROM. Specifically tailored for buffering clocks for data converters and high-speed digital signals, the CDCE18005 achieves low additive jitter in the 50 fs RMS(1) range. The clock distribution block includes five individually programmable outputs that can be configured to provide different combinations of output formats (LVPECL, LVDS, LVCMOS). Each output can also be programmed to a unique output frequency (up to 1.5 GHz(2)

Pricing


Qty Price (USD)
1-99 10.956
100-249 9.57
250-999 7.379
1,000+ 6.6

Additional package qty | carrier options

Package qty | Carrier 2,500 | LARGE T&R
Inventory 7,500
Qty | Price (USD) 1ku | 5.808 1-99 9.641 100-249 8.422 250-999 6.493 1,000+ 5.808
Custom reel may be available