Packaging information
| Package | Pins NFBGA (ZEZ) | 201 |
| Operating temperature range (°C) -30 to 85 |
| Package qty | Carrier 119 | BULK |
Features for the DLPC3437
- Display controller for DLP3310 (.33 1080p) DMD
- Two DLP3437 controllers drive the DLP3310 DMD
- Supports input image sizes up to 1080p
- Low-power DMD interface with interface training
- Input frame rates up to 120 Hz (60 Hz at 1080p resolution)
- Pixel data processing:
-
IntelliBright™
suite of image processing algorithms
- Content adaptive illumination control (CAIC)
- Local area brightness boost (LABB)
- Color coordinate adjustment
- Programmable degamma
- Image resizing (scaling)
- Color space conversion
-
IntelliBright™
suite of image processing algorithms
- 24-bit, input pixel interface support:
- Parallel interface protocol
- Pixel clock up to 155 MHz
- Multiple input pixel data format options
- Dual FPD-link input pixel interface support utilize with required FPGA:
- LVDS interface
- Effective pixel clock up to 155 MHz
- External flash support
- Auto DMD parking at power down
- Embedded frame memory (eDRAM)
- System features:
- I2C control of device configuration
- Programmable splash screens
- Programmable LED current control
- One frame latency
- Pair with DLPA3000 or DLPA3005 PMIC (power management integrated circuit) and LED driver
Description for the DLPC3437
The DLPC3437 digital controller, part of the DLP3310 (.33 1080p) chipset, supports reliable operation of the DLP3310 digital micromirror device (DMD). The DLPC3437 controller provides a convenient, multifunctional interface between system electronics and the DMD, enabling small form factor, low power, and high resolution full HD displays.
Visit the getting started with TI DLP Pico™ display technology page, and view the programmer’s guide to learn how to get started.
The chipsets include established resources to help the user accelerate the design cycle, which includeproduction ready optical modules, optical module manufacturers, and design houses.