text.skipToContent text.skipToNavigation


DDR Termination Regulator

Inventory: 14,140

Quality information

RoHS Yes
Lead finish / Ball material SN
MSL rating / Peak reflow Level-3-260C-168 HR
Material content View
DPPM / MTBF / Fit rate View
Qualification summary View
Ongoing reliability monitoring View
Device marking View

Packaging information

Package | Pins Package qty | Carrier Operating temperature range (°C)
HSOIC (DDA) | 8 95 | TUBE
0 to 125
Package | Pins HSOIC (DDA) | 8
Package qty | Carrier 95 | TUBE
Operating temperature range (°C) 0 to 125
View TI packaging information

Features for the LP2995

  • Low Output Voltage Offset
  • Works with +5v, +3.3v and 2.5v Rails
  • Source and Sink Current
  • Low External Component Count
  • No External Resistors Required
  • Linear Topology
  • Available in SOIC-8, SO PowerPAD-8 or WQFN-16 Packages
  • Low Cost and Easy to Use

All trademarks are the property of their respective owners.

Description for the LP2995

The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2995 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DDR DIMMS.


Qty Price (USD)
1-99 1.064
100-249 0.879
250-999 0.631
1,000+ 0.475

Additional package qty | carrier options

Package qty | Carrier 2,500 | LARGE T&R
Inventory 34,019
Qty | Price (USD) 1ku | 0.396 1-99 0.978 100-249 0.752 250-999 0.554 1,000+ 0.396
Custom reel may be available