ADC09QJ1300-Q1 is a quad channel, 9-bit, 1.3 GSPSanalog-to-digital converter (ADC). Low power consumption, high sampling rate and 9-bit resolutionmakes the ADC09QJ1300-Q1 ideally suited for light detection and ranging (LiDAR) systemsand handheld test equipment. ADC09QJ1300-Q1 qualified for automotiveapplications.
Full-power input bandwidth (-3 dB) of 6 GHz provides flat frequency response forfrequency modulated continuous wave (FMCW) LiDAR systems and provides a narrow impulse response forpulse-based systems. The full-power input bandwidth also enables direct RF sampling ofup to 4GHz.
A number of clocking features are included to relax system hardware requirements, such asan internal phase-locked loop (PLL) with integrated voltage-controlled oscillator (VCO) to generatethe sampling clock. Four clock outputs are provided to clock the logic and SerDes of the FPGA orASIC. A timestamp input and output is provided for pulsed systems.
JESD204C serialized interface decreases system size by reducing the amount of printedcircuit board (PCB) routing. Interface modes support from 2 to 8 lanes and SerDes linerates up to 17.16 Gbps to allow theoptimal configuration for each application.