Packaging information
| Package | Pins X2SON (DQE) | 8 |
| Operating temperature range (°C) -40 to 85 |
| Package qty | Carrier 5,000 | LARGE T&R |
Features for the PCA9306
- 2-Bit bidirectional translator for SDA and SCL lines in mixed-mode I 2C Applications
- I 2C and SMBus compatible
- Less than 1.5-ns maximum propagation delay to accommodate standard-mode and fast-mode I 2C devices and multiple controllers
- Allows voltage-level translation between
- 1.2-V V REF1 and 1.8-V, 2.5-V, 3.3-V, or 5-V V REF2
- 1.8-V V REF1 and 2.5-V, 3.3-V, or 5-V V REF2
- 2.5-V V REF1 and 3.3-V or 5-V V REF2
- 3.3-V V REF1 and 5-V V REF2
- Provides bidirectional voltage translation with no direction pin
- Low 3.5-Ω ON-state resistance between input and output ports provides less signal distortion
- Open-drain I 2C I/O ports (SCL1, SDA1, SCL2, and SDA2)
- 5-V Tolerant I 2C I/O ports to support mixed-mode signal operation
- High-impedance SCL1, SDA1, SCL2, and SDA2 pins for EN = low
- Lockup-free operation for isolation when EN = low
- Flow-through pinout for ease of printed-circuit-board trace routing
- Latch-up performance exceeds 100 mA Per JESD 78, class II
- ESD protection exceeds JESD 22
- 2000-V Human-body model (A114-A)
- 1000-V Charged-device model (C101)
Description for the PCA9306
The PCA9306 device is a dual bidirectional I 2C and SMBus voltage-level translator with an enable (EN) input, and is operational from 1.2-V to 3.3-V V REF1 and 1.8-V to 5.5-V V REF2.
The PCA9306 device allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin. The low ON-state resistance (R ON) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports.
In addition to voltage translation, the PCA9306 device can be used to isolate a 400-kHz bus from a 100-kHz bus by controlling the EN pin to disconnect the slower bus during fast-mode communication.