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PCAXC1T45QDCKRQ1

Automotive single-bit dual-supply bus transceiver

Packaging

Package | PIN: SOT-SC70 (DCK) | 6
Temp: Q (-40 to 125)
Carrier: Cut Tape
Qty Price
1-9 $0.63
10-24 $0.56
25-99 $0.51
100-249 $0.43
250-499 $0.39
500-749 $0.30
750-999 $0.23
1000+ $0.20

Features

  • AEC-Q100 Qualified for Automotive Applications
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range from 0.65 V to 3.6 V
  • Operating Temperature: –40°C to +125°C
  • Glitch-Free Power Supply Sequencing
  • Maximum Quiescent Current (ICCA + ICCB) of 8 µA (85°C Maximum) and 14 µA (125°C Maximum)
  • Up to 500-Mbps Support When Translating from 1.8 to 3.3V
  • VCC Isolation Feature
    • If Either VCC Input is Below 100 mV, All I/Os Outputsare Disabled and Become High-Impedance
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human Body Model
    • 1000-V Charged-DeviceModel

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Texas Instruments  PCAXC1T45QDCKRQ1

The SN74AXC1T45-Q1 is AEC-Q100 qualified single-bit non-inverting bus transceiver thatuses two individually configurable power-supply rails. The device is operational with bothVCCA and VCCB supplies as low as 0.65 V. The A portis designed to track VCCA, which accepts any supply voltage from 0.65 V to3.6 V. The B port is designed to track VCCB, which also accepts any supplyvoltage from 0.65 V to 3.6 V. Additionally, the SN74AXC1T45-Q1 is compatible with a single-supplysystem.

The DIR pin determines the direction of signal propagation. With the DIR pin configuredHIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B toPort A. The DIR pin is referenced to VCCA, meaning that its logic-high andlogic-low thresholds track with VCCA.

This device is fully specified for partial-power-down applications using theIoff current. The Ioff protection circuitry ensuresthat no excessive current is drawn from or to an input, output, or combined I/O that is biased to aspecific voltage while the device is powered down.

The VCC isolation feature ensures that if eitherVCCA or VCCB is less than 100 mV, both I/O portsenter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off inany order while providing robust power sequencing performance.