Packaging information
| Package | Pins TQFP (PJT) | 32 |
| Operating temperature range (°C) -25 to 85 |
| Package qty | Carrier 1,000 | LARGE T&R |
Features for the PCM2706C
- On-Chip USB Interface:
- No Dedicated Device Driver Needed
- Full-Speed Transceivers
- Fully Compliant With USB 2.0 Specification
- USB 1.1 Descriptors With USB Audio
Class Support
- USB 1.1 Descriptors With USB Audio
- Certified by USB-IF
- Partially Programmable Descriptors
- Adaptive Isochronous Transfer for Playback
- Bus-Powered or Self-Powered Operation
- Sampling Rates: 32 kHz, 44.1 kHz, and 48 kHz
- On-Chip Clock Generator With Single 12-MHz
Clock Source - Single Power Supply:
- Bus-Powered: 5 V, Typical (VBUS)
- Self-Powered: 3.3 V, Typical
- 16-Bit Delta-Sigma Stereo DAC
- Analog Performance at 5 V (Bus-Powered),
3.3 V (Self-Powered):- THD + N: 0.006% RL > 10 kΩ, Self-
Powered - THD + N: 0.025% RL = 32 Ω
- SNR = 98 dB
- Dynamic Range: 98 dB
- PO = 12 mW, RL = 32 Ω
- THD + N: 0.006% RL > 10 kΩ, Self-
- Oversampling Digital Filter
- Passband Ripple = ±0.04 dB
- Stop-Band Attenuation = –50 dB
- Single-Ended Voltage Output
- Analog LPF Included
- Analog Performance at 5 V (Bus-Powered),
- Multiple Functions:
- Up to Eight Human Interface Device (HID)
Interfaces (Model and Setting Dependent) - Suspend Flag
- S/PDIF Out With SCMS
- External ROM Interface (PCM2704C/6C)
- Serial Programming Interface (PCM2705C/7C)
- I2S Interface (Selectable on PCM2706C/7C)
- Up to Eight Human Interface Device (HID)
Description for the PCM2706C
The PCM270xC are TI’s single-chip USB stereo audio digital-to-analog converters (DACs) with USB 2.0 compliant full-speed protocol controller and S/PDIF. The USB-protocol controller works with no software code, but USB descriptors can be modified in some areas (for example, vendor ID/product ID) through the use of an external ROM (PCM2704C and PCM2706C) or serial peripheral interface (SPI) (PCM2705C and PCM2707C). The PCM270xC also employ SpAct architecture, TI's unique system that recovers the audio clock from USB packet data. On-chip analog phase-locked loops (PLLs) with SpAct enable playback with low clock jitter.