|Package | PIN:||HTSSOP (PWP) | 16|
|Temp:||Q (-40 to 125)|
- N-channel H-bridge motor driver
- Drives one bidirectional brushed DCmotor
- Two unidirectional brushed DC motors
- Other resistiveand inductive loads
- 4.5-V to 37-V operating supply voltage range
- High output current capability
- DRV8876: 3.5-APeak
- Integrated current sensing and regulation
- Proportional current output (IPROPI)
- Selectable current regulation (IMODE)
- Cycle-by-cycle or fixed off time
- Selectable input control modes (PMODE)
- PH/EN and PWM H-bridge control modes
- Independenthalf-bridge control mode
- Supports 1.8-V, 3.3-V, and 5-V logic inputs
- Ultra low-power sleep mode
- <1-µA @ VVM = 24-V, TJ =25°C
- Spread spectrum clocking For low electromagnetic interference (EMI)
- Integrated protection features
- Undervoltage lockout (UVLO)
- Charge pumpundervoltage (CPUV)
- Overcurrent protection (OCP)
- Thermalshutdown (TSD)
- Automatic fault recovery
- Fault indicator pin(nFAULT)
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Texas Instruments PDRV8876PWPR
The DRV887x family of devices are flexible motor drivers for awide variety of end applications. The devices integrate an N-channel H-bridge, charge pumpregulator, current sensing and regulation, current proportional output, and protection circuitry.The charge pump improves efficiency by allowing for both high-side and low-side N-channels MOSFETsand 100% duty cycle support. The family of devices come in pin to pin, scalableRDS(on) options to support different loads with minimal designchanges.
Integrated current sensing allows for the driver to regulate the motor current duringstart up and high load events. A current limit can be set with an adjustable external voltagereference. Additionally, the devices provide an output current proportional to the motor loadcurrent. This can be used to detect motor stall or change in load conditions. The integratedcurrent sensing uses an internal current mirror architecture, removing the need for a large powershunt resistor, saving board area and reducing system cost.
A low-power sleep mode is provided to achieve ultra-low quiescent current draw byshutting down most of the internal circuitry. Internal protection features are provided for supplyundervoltage lockout (UVLO), charge pump undervoltage (CPUV), output overcurrent (OCP), and deviceovertemperature (TSD). Fault conditions are indicated on nFAULT.