|Package | PIN:||SOT-23 (DBV) | 5|
|Temp:||I (-40 to 85)|
- Designed for signaling rates up to 400 Mbps
- Single 3.3-V power supply design (3-V to 3.6-V range)
- 100-ps typical differential skew
- 3.5-ns maximum propagation delay
- Accepts small swing differential signal levels
- Power off protection (high impedance on LVDS inputs)
- Flow-through pinout simplifies PCB layout
- Low power dissipation (10-mW typical at 3.3-V typical supply)
- LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
- Failsafe protection for open, short, and terminated inputs
- 5-pin SOT-23 package
- Meets or exceeds ANSI TIA/EIA-644-A standard
- Industrial temperature operating range (−40°C to +85°C)
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Texas Instruments PDSLVDS1002DBVT
The DSLVDS1002 device is a single-channel, Low-Voltage Differential Signaling (LVDS)receiver designed for applications requiring low power dissipation, low noise, and high data rates.In addition, the short-circuit fault current is also minimized. The DSLVDS1002 device is designedto support data rates that are at least 400 Mbps (200 MHz) using LVDS technology.
The DSLVDS1002 accepts low voltage differential input signals and outputs a 3.3-VCMOS/TTL signal. The receivers also support open, shorted, and terminated (100 Ω) input fail-safe.The receiver output will be HIGH for all fail-safe conditions. The DSLVDS1002 is in a 5-pin SOT-23package that is designed for easy PCB layout.
The DSLVDS1002 can be paired with its companion single line driver, the DSLVDS1001, orwith any LVDS driver, to provide a high-speed LVDS Interference.