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PUCC27282DR ACTIVE

3-A, 120-V half bridge gate driver with 5-V UVLO, interlock and enable

Inventory: 953
Limit:  50

Quality information

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Packaging information

Package | Pins Package qty | Carrier Operating temperature range (°C)
SOIC (D) | 8 2,500 | LARGE T&R
-40 to 125
Package | Pins SOIC (D) | 8
Package qty | Carrier 2,500 | LARGE T&R
Operating temperature range (°C) -40 to 125
View TI packaging information

Features for the UCC27282

  • Drives two N-channel MOSFETs in high-side low-side configuration
  • 5-V typical under voltage lockout
  • Input interlock
  • Enable/disable functionality in DRC package
  • 16-ns typical propagation delay
  • 12-ns rise, 10-ns fall time with 1.8-nF load
  • 1-ns typical delay matching
  • Absolute Maximum Negative Voltage Handling on Inputs (–5 V)
  • Absolute Maximum Negative Voltage Handling on HS (–14 V)
  • 3.5-A sink, 2.5-A Source output currents
  • Absolute maximum boot voltage 120 V
  • Low current (7-µA) consumption when disabled
  • Integrated bootstrap diode
  • Specified from –40°C to 140°C junction temperature

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Description for the UCC27282

The UCC27282 is a robust N-channel MOSFET driver with amaximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to becontrolled in half-bridge or synchronous buck configuration based topologies. Its 3.5-A peak sinkcurrent and 2.5-A peak source current along with low pull-up and pull-down resistance allows theUCC27282 to drive large power MOSFETs with minimum switchinglosses during the transition of the MOSFET Miller plateau. Since the inputs are independent of thesupply voltage, UCC27282 can be used in conjunction with bothanalog and digital controllers.

The input pins as well as the HS pin are able to tolerate significant negative voltage,which improves system robustness. Input interlock further improves robustness and systemreliability in high noise applications. The enable and disable functionality provides additionalsystem flexibility by reducing power consumption by the driver and responds to fault events withinthe system. 5-V UVLO allows systems to operate at lower bias voltages, which is necessary in manyhigh frequency applications and improves system efficiency in certain operating modes. Smallpropagation delay and delay matching specifications minimize the dead-time requirement whichfurther improves efficiency.

Under voltage lockout (UVLO) is provided for both the high-side and low-side driverstages forcing the outputs low if the VDD voltage is below the specified threshold. An integratedbootstrap diode eliminates the need for an external discrete diode in many applications, whichsaves board space and reduces system cost. UCC27282 is offered ina small package enabling high density designs.

Pricing


Qty Price (USD)
1-99 1.411
100-249 1.166
250-999 0.837
1,000+ 0.63