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SCANSTA111MT/NOPB ACTIVE

Enhanced SCAN Bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port

Inventory: 7,467  
 

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material SN
MSL rating / Peak reflow Level-2-260C-1 YEAR
Quality, reliability
& packaging information

Information included:

  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
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Packaging information

Package | Pins Package qty | Carrier: Operating temperature range (℃)
TSSOP (DGG) | 48 38 | TUBE
-40 to 85
Package | Pins TSSOP (DGG) | 48
Package qty | Carrier: 38 | TUBE
Operating temperature range (℃) -40 to 85
View TI packaging information

Features for the SCANSTA111

  • True IEEE 1149.1 Hierarchical and Multidrop Addressable Capability
  • The 7 Slot Inputs Support Up to 121 Unique Addresses, an Interrogation Address, Broadcast Address, and 4 Multi-Cast Group Addresses (Address 000000 is Reserved)
  • 3 IEEE 1149.1-Compatible Configurable Local Scan Ports
  • Mode Register0 Allows Local TAPs to be Bypassed, Selected for Insertion Into the Scan Chain Individually, or Serially in Groups of Two or Three
  • Transparent Mode can be Enabled with a Single Instruction to Conveniently Buffer the Backplane IEEE 1149.1 Pins to those on a Single Local Scan Port
  • LSP ACTIVE Outputs Provide Local Port Enable Signals for Analog Busses Supporting IEEE 1149.4.
  • General Purpose Local Port Pass-Through Bits are Useful for Delivering Write Pulses for FPGA Programming or Monitoring Device Status.
  • Known Power-Up State
  • TRST on All Local Scan Ports
  • 32-Bit TCK Counter
  • 16-Bit LFSR Signature Compactor
  • Local TAPs can become TRI-STATE via the OE Input to Allow an Alternate Test Master to Take Control of the Local TAPs (LSP0-2 Have a TRI-STATE Notification Output)
  • 3.0-3.6V VCC Supply Operation
  • Power-Off High Impedance Inputs and Outputs
  • Supports Live Insertion/Withdrawal

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Description for the SCANSTA111

The SCANSTA111 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA111 supports up to 3 local IEEE 1149.1 scan rings which can be accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs. Backplane and inter-board testing can easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested.

Pricing


Qty Price (USD)
1-99 10.265
100-249 8.369
250-999 6.578
1,000+ 5.579

Additional package qty | carrier options

Package qty | Carrier 1,000 | LARGE T&R
Inventory 21,000
Qty | Price (USD) 1ku | 4.721 1-99 8.687 100-249 7.082 250-999 5.566 1,000+ 4.721
Custom reel may be available