text.skipToContent text.skipToNavigation

SN74ABT16500BDL ACTIVE

18-bit universal bus transceivers with 3-state outputs

Same as: SN74ABT16500BDLG4   This part number is identical to the part number listed above. You can only order quantities of the part number listed above.

Inventory: 1,280  
 

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow Level-1-260C-UNLIM
Quality, reliability
& packaging information

Information included:

  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
View or download

Packaging information

Package | Pins Package qty | Carrier: Operating temperature range (℃)
SSOP (DL) | 56 20 | TUBE
-40 to 85
Package | Pins SSOP (DL) | 56
Package qty | Carrier: 20 | TUBE
Operating temperature range (℃) -40 to 85
View TI packaging information

Features for the SN74ABT16500B

  • Members of the Texas Instruments WidebusTM Family
  • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
  • UBTTM (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 5 V, TA = 25°C
  • High-Impedance State During Power Up and Power Down
  • Flow-Through Architecture Optimizes PCB Layout
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

Widebus, EPIC-IIB, and UBT are trademarks of Texas Instruments Incorporated.

Description for the SN74ABT16500B

These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB\ and CLKBA\) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB\ is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB\. OEAB is active-high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses OEBA\, LEBA, and CLKBA\. The output enables are complementary (OEAB is active high and OEBA\ is active low).

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

The SN54ABT16500B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16500B is characterized for operation from -40°C to 85°C.

Pricing


Qty Price (USD)
1-99 3.533
100-249 3.096
250-999 2.171
1,000+ 1.749

Additional package qty | carrier options

Package qty | Carrier 1,000 | LARGE T&R
Inventory 4,468
Qty | Price (USD) 1ku | 1.48 1-99 2.99 100-249 2.62 250-999 1.837 1,000+ 1.48
Custom reel may be available