|Package | PIN:||TSSOP (PW) | 24|
|Temp:||S (-40 to 125)|
- Qualified for Automotive Applications
- AEC Q100 Test Guidance With the Following Results:
- Device TemperatureGrade 1: –40°C to +125°C Ambient Operating Temperature Range
- Device HBM ESDClassification Level H2
- Device CDM ESD Classification LevelC3B
- Control Inputs VIH and VIL Levels Are Referenced to VCCA Voltage
- VCC Isolation Feature – If Either VCC Input Is at GND, All I/O Ports Are in the High-Impedance State
- Ioff Supports Partial Power-Down-Mode Operation
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range
- I/Os Are 4.6-V Tolerant
- Maximum Data Rates
- 170 Mbps (VCCA < 1.8 V orVCCB < 1.8 V)
- 320 Mbps (VCCA ≥ 1.8 V and VCCB ≥ 1.8 V)
- Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
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Texas Instruments SN74AVC8T245QPWRQ1
The SN74AVC8T245-Q1 is an 8-bit noninverting bus transceiver that uses two separateconfigurable power-supply rails. The SN74AVC8T245-Q1 operation is optimimal withVCCA and VCCB set at
1.4 V to 3.6 V. It is operational with VCCA andVCCB as low as 1.2 V. The A port is designed to trackVCCA. VCCA accepts any supply voltage from 1.2 V to3.6 V. The B port is designed to track VCCB. VCCBaccepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectionaltranslation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVC8T245 design enables asynchronous communication between data buses. The devicetransmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logiclevel at the direction-control (DIR) input. One can use the output-enable(OE) input to disable the outputs so the buses are effectivelyisolated.
In the SN74AVC8T245 design, VCCA supplies the control pins (DIRand OE).
This device specification covers partial-power-down applications usingIoff. The Ioff circuitry disables the outputs whenthe device is powered down. This inhibits current backflow into the device which prevents damage tothe device.
The VCC isolation feature ensures that if eitherVCC input is at GND, both ports are in the high-impedance state.
To ensure the high-impedance state during power up or power down, tieOE to VCC through a pullup resistor; thecurrent-sinking capability of the driver determines the minimum value of the resistor.