|Package | PIN:||UQFN (RSV) | 16|
|Temp:||Q (-40 to 125)|
- Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range From 0.65 V to 3.6 V
- Operating Temperature From –40°C to +125°C
- Multiple Direction Control Pins to Allow Simultaneous Up and Down Translation
- Glitch-Free Power Supply Sequencing
- Up to 380 Mbps Support When Translating from 1.8 V to 3.3 V
- VCC Isolation Feature
- If Either VCC Input is Below 100 mV, All I/Os Outputsare Disabled and Become High-Impedance
- Ioff Supports Partial-Power-Down Mode Operation
- Compatible With AVC Family Level Shifters
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 8000-V Human-Body Model
- 1000-V Charged-Device Model
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Texas Instruments SN74AXC4T245RSVR
The SN74AXC4T245 is a four-bit noninverting bus transceiver that uses two individuallyconfigurable power-supply rails. The device is operational with both VCCAand VCCB supplies as low as 0.65 V. The A port is designed to trackVCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port isdesigned to track VCCB, which also accepts any supply voltage from 0.65 V to3.6 V. Additionally the SN74AXC4T245 is compatible with a single-supply system.
The SN74AXC4T245 device is designed for asynchronous communication between data buses.The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending onthe logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs(1OE and 2OE) are used to disable the outputs so thebuses are effectively isolated. The SN74AXC4T245 device is designed so the control pins (xDIR andxOE) are referenced to VCCA.
To ensure the high-impedance state of the level shifter I/Os during power up or powerdown, the xOE pins should be tied to VCCA through apullup resistor.
This device is fully specified for partial-power-down applications using theIoff current. The Ioff protection circuitry ensuresthat no excessive current is drawn from or to an input, output, or combined I/O that is biased to aspecific voltage while the device is powered down.
The VCC isolation feature ensures that if eitherVCCA or VCCB is less than 100 mV, both I/O portsenter a high-impedance state by disabling their outputs.
Glitch-Free power supply sequencing allows either supply rail to be powered on or off inany order while providing robust power sequencing performance.