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8-bit dual-supply bus transceiver

Availability: 8,292


Package | PIN: TSSOP (PW) | 24
Temp: Q (-40 to 125)
Package qty | Carrier: 2,000 | LARGE T&R
Custom reel may be available
Qty Price
1-99 $0.87
100-249 $0.74
250-999 $0.49
1,000+ $0.35


  • Qualified Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range From 0.65 V to 3.6 V
  • Operating Temperature From –40°C to +125°C
  • Multiple Direction Control Pins to Allow Simultaneous Up and Down Translation
  • Up to 380 Mbps Support When Translating from 1.8 V to 3.3 V
  • VCC Isolation Feature to Effectively Isolate Both Buses in a Power-Down Scenario
  • Partial Power-Down Mode to Limit Backflow Current in a Power-Down Scenario
  • Compatible With SN74AVC8T245 and 74AVC8T245 Level Shifters
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model
    • 1000-V Charged-Device Model

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Texas Instruments  SN74AXC8T245PWR

The SN74AXC8T245 device is an 8-bit non-inverting bus transceiver thatresolves voltage level mismatch between devices operating at the latest voltage nodes (0.7 V, 0.8V, and 0.9 V) and devices operating at industry standard voltage nodes (1.8 V, 2.5 V, 3.3 V) andvice versa.

The device operates by using two independent power-supply rails(VCCA and VCCB) that operate as low as 0.65 V. Datapins A1 through A8 are designed to track VCCA, which accepts any supplyvoltage from 0.65 V to 3.6 V. Data pins B1 through B8 are designed to trackVCCB, which accepts any supply voltage from 0.65 V to 3.6 V.

The SN74AXC8T245 device is designed for asynchronous communication betweendata buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus,depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable(OE) input is used to disable the outputs so the buses are effectivelyisolated.

The SN74AXC8T245 device is designed so the control pins (DIR andOE) are referenced to VCCA.

This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs whenthe device is powered down. This inhibits current backflow into the device which prevents damage tothe device.

The VCC isolation feature ensures that if eitherVCC input supply is below 100 mV, all level shifter outputs are disabled andplaced into a high-impedance state.

To ensure the high-impedance state of the level shifter I/Os during power up or powerdown, OE should be tied to VCCA through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of thedriver.