Packaging information
| Package | Pins TSSOP (PW) | 16 |
| Operating temperature range (°C) -40 to 125 |
| Package qty | Carrier 2,000 | LARGE T&R |
Features for the SN74AXCH4T245
- Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
- Bus-hold on data inputs eliminates the need for external pullup or pulldown resistors
- Operating temperature from –40°C to +125°C
- Multiple direction control pins to allow simultaneous up and down translation
- Glitch-free power supply sequencing
- Up to 380 Mbps support when translating from 1.8 V to 3.3 V
- VCC isolation feature
- Ioff supports partial-power-down mode operation
- Compatible with AVC family level shifters
- Latch-up performance exceeds 100 mA per JESD 78, Class II
- ESD protection exceeds JESD 22
- 8000-V Human-body model
- 1000-V Charged-device model
Description for the SN74AXCH4T245
The SN74AXCH4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. The SN74AXCH4T245 device is compatible with a single-supply system.
The SN74AXCH4T245 device is designed for asynchronous communication between data buses and transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1OE and 2OE) are used to disable the outputs so the buses are effectively isolated. All control pins (xDIR and xOE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control or output enable pins.
To ensure the high-impedance state of the level shifter I/Os during power up or power down, the xOE pins should be tied to VCCA through a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or sourced into an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, all I/O ports enter a high-impedance state by disabling the outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.