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SN74HC161D ACTIVE

4-Bit Synchronous Binary Counters

Same as: SN74HC161DG4   This part number is identical to the part number listed above. You can only order quantities of the part number listed above.

Inventory: 4,419
 

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow Level-1-260C-UNLIM
Material content View
DPPM / MTBF / Fit rate View
Qualification summary View
Ongoing reliability monitoring View
Device marking View

Packaging information

Package | Pins Package qty | Carrier Operating temperature range (°C)
SOIC (D) | 16 40 | TUBE
I (-40 to 85)
Package | Pins SOIC (D) | 16
Package qty | Carrier 40 | TUBE
Operating temperature range (°C) I (-40 to 85)
View TI packaging information

Features for the SN74HC161

  • Wide Operating Voltage Range of 2 V to 6 V
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 14 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Internal Look-Ahead for Fast Counting
  • Carry Output for n-Bit Cascading
  • Synchronous Counting
  • Synchronously Programmable

Description for the SN74HC161

These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. The ’HC161 devices are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.

These counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs.

The clear function for the ’HC161 devices is asynchronous. A low level at the clear (CLR)\ input sets all four of the flip-flop outputs low, regardless of the levels of the CLK, load (LOAD)\, or enable inputs.

The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are ENP, ENT, and a ripple-carry output (RCO). Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a high-level pulse while the count is maximum (9 or 15 with QA high). This high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the level of CLK.

These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD\) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times.

Pricing


Qty Price (USD)
1-99 $0.261
100-249 $0.177
250-999 $0.137
1,000+ $0.091

Additional package qty | carrier options

Package qty | Carrier 2,500 | LARGE T&R
Inventory 78,613
Qty | Price (USD) 1ku | $0.076 1-99 $0.218 100-249 $0.148 250-999 $0.114 1,000+ $0.076
Custom reel may be available

Package qty | Carrier 250 | SMALL T&R
Inventory 250
Qty | Price (USD) 1ku | $0.231 1-99 $0.571 100-249 $0.439 250-999 $0.323 1,000+ $0.231