text.skipToContent text.skipToNavigation

SN74HCS74QDRQ1

Automotive Schmitt-trigger input dual D-type positive-edge-triggered flip-flops w/ clear and preset

Availability: 4,975

Packaging

Package | PIN: SOIC (D) | 14
Temp: Q (-40 to 125)
Package qty | Carrier: 2,500 | LARGE T&R
Qty Price
1-99 $0.39
100-249 $0.33
250-999 $0.21
1,000+ $0.14

Features

  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C,TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation LevelC6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100nA
  • ±7.8-mA output drive at 5 V

All trademarks are the property of their respective owners.

Texas Instruments  SN74HCS74QDRQ1

The device contains two independent D-type positive-edge-triggered flip-flops. All inputsinclude Schmitt triggers, allowing for slow or noisy input signals. A low level at the preset(PRE) input sets the output high. A low level at the clear(CLR) input resets the output low. Preset and clear functions areasynchronous and not dependent on the levels of the other inputs. When PREand CLR are inactive (high), data at the data (D) input meeting the setuptime requirements is transferred to the outputs (Q, Q) on the positive-goingedge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directlyrelated to the rise time of the input clock (CLK) signal. Following the hold-time interval, data atthe data (D) input can be changed without affecting the levels at the outputs (Q,Q).