Packaging information
| Package | Pins TVSOP (DGV) | 14 |
| Operating temperature range (°C) -40 to 85 |
| Package qty | Carrier 2,000 | LARGE T&R |
Features for the SN74LV20A
- 2-V to 5.5-V VCC Operation
- Max tpd of 6 ns at 5 V
- Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot)
>>2.3 V at VCC = 3.3 V, TA = 25°C - Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Description for the SN74LV20A
These dual 4-input positive-NAND gates are designed for 2-V to 5.5-V VCC operation.
The 'LV20A devices perform the Boolean function Y = (A • B • C • D)\ or Y = A\ + B\ + C\ + D\ in positive logic.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.