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Automotive Single Positive-Edge-Triggered D-Type Flip-Flop

Availability: 3,000


Package | PIN: SOT-SC70 (DCK) | 5
Temp: Q (-40 to 125)
Carrier: Cut Tape
Qty Price
1-9 $0.22
10-24 $0.19
25-99 $0.18
100-249 $0.15
250-499 $0.14
500-749 $0.11
750-999 $0.08
1000+ $0.07


  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • ±4000-V Human-Body Model (HBM) ESD Classification Level3A
    • ±1000-V Charged-Device Model (CDM) ESD ClassificationLevel C5
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Supports Down Translation to VCC
  • Max tpd of 6 ns at 3.3 V and 50 pF load
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff supports Partial-Power-Down Mode and Back-Drive Protection

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Texas Instruments  SN74LVC1G79QDCKRQ1

This automotive AEC-Q100 qualified singlepositive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation.

When data at the data (D) input meets the setup time requirement, the data is transferredto the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltagelevel and is not directly related to the rise time of the clock pulse. Following the hold-timeinterval, data at the D input can be changed without affecting the level at the output.

This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.