SN74LVC32APWRE4

Features

• Operate From 1.65 V to 3.6 V
• Specified From –40°C to +85°C, –40°C to +125°C, and –55°C to +125°C
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 3.8 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model
  • 200-V Machine Model
  • 1000-V Charged-Device Model

Texas Instruments  SN74LVC32APWRE4

The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7-V to 3.6-V V_CC operation, and the SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V V_CC operation.

The SNx4LVC32A devices perform the Boolean function Y = A + B or Y = A\ + B\ in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.