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SN74S175N ACTIVE

Quadruple D-Type Flip-Flops With Clear

Inventory: 400  
 

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow N/A for Pkg Type
Quality, reliability
& packaging information

Information included:

  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
View or download

Packaging information

Package | Pins Package qty | Carrier: Operating temperature range (℃)
PDIP (N) | 16 25 | TUBE
0 to 70
Package | Pins PDIP (N) | 16
Package qty | Carrier: 25 | TUBE
Operating temperature range (℃) 0 to 70
View TI packaging information

Features for the SN74S175

  • '174, 'LS174, 'S174 Contain Six Flip-Flops with Single-Rail Outputs
  • '175, 'LS175, 'S175 Contain Four Flip-Flops with Double-Rail Outputs
  • Three Performance Ranges Offered: See Table Lower Right
  • Buffered Clock and Direct Clear Inputs
  • Individual Data Input to Each Flip-Flop
  • Applications include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators

Description for the SN74S175

These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.

These circuits are fully compatible for use with most TTL circuits.

Pricing


Qty Price (USD)
1-99 2.168
100-249 1.791
250-999 1.286
1,000+ 0.968