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SN74S175N

Quadruple D-Type Flip-Flops With Clear

Availability: 1,000

Packaging

Package | PIN: PDIP (N) | 16
Temp: C (0 to 70)
Carrier: Partial Tube
Qty Price
1-9 $2.60
10-24 $2.33
25-99 $2.17
100-249 $1.89
250-499 $1.74
500-749 $1.46
750-999 $1.20
1000+ $1.10

Features

  • '174, 'LS174, 'S174 Contain Six Flip-Flops with Single-Rail Outputs
  • '175, 'LS175, 'S175 Contain Four Flip-Flops with Double-Rail Outputs
  • Three Performance Ranges Offered: See Table Lower Right
  • Buffered Clock and Direct Clear Inputs
  • Individual Data Input to Each Flip-Flop
  • Applications include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators

Texas Instruments  SN74S175N

These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.

These circuits are fully compatible for use with most TTL circuits.