Packaging information
| Package | Pins VQFN (RGY) | 20 |
| Operating temperature range (°C) -40 to 125 |
| Package qty | Carrier 3,000 | LARGE T&R |
Features for the TCAN4551-Q1
- AEC-Q100:
qualified for automotive applications
- Temperature grade 1: –40°C to 125°C TA
- CAN FD controller with integrated CAN FD transceiver and serial peripheral interface (SPI)
- CAN FD controller supports both ISO 11898-1:2015 and Bosch M_CAN Revision 3.2.1.1
- Meets the requirements of ISO 11898-2:2016
- Supports CAN FD data rates up to 8 Mbps with up to 18 MHz SPI clock speed
- Classic CAN backwards compatible
- Operating modes: normal, standby, sleep, and failsafe
- 1.8 V, 3.3 V to 5 V input/output logic support for microprocessors
- Wide
operating ranges on CAN bus
- ±58 V bus fault protection
- ±12 V common mode
- Optimized behavior when unpowered
- Bus and logic terminals are high impedance
(No load to operating bus or application) - Power up and down glitch free operation
- Bus and logic terminals are high impedance
Description for the TCAN4551-Q1
The TCAN4551-Q1 is a CAN FD controller with an integrated CAN FD transceiver supporting data rates up to 8 Mbps. The CAN FD controller meets the specifications of the ISO11898-1:2015 high speed controller area network (CAN) data link layer and meets the physical layer requirements of the ISO11898–2:2016 high speed CAN specification. The TCAN4551-Q1 provides an interface between the CAN bus and the system processor through serial peripheral interface (SPI), supporting both classic CAN and CAN FD, allowing port expansion of CAN and CAN FD or CAN support with processors that do not support CAN FD. The TCAN4551-Q1 provides CAN FD transceiver functionality: differential transmit capability to the bus and differential receive capability from the bus. The device supports wake up via local wake up (LWU) and bus wake using the CAN bus implementing the ISO11898-2:2016 Wake Up Pattern (WUP).
The device includes many protection features providing device and CAN bus robustness. These features include failsafe features, internal dominant state timeout and wide bus operating range as examples.