64-pin (RCP) package image

TLK1211RCP ACTIVE

Gigabit Ethernet SerDes for PON

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Quality information

Rating Catalog
RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow Level-3-260C-168 HR
Quality, reliability
& packaging information

Information included:

  • RoHS
  • REACH
  • Device marking
  • Lead finish / Ball material
  • MSL rating / Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
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Additional manufacturing information

Information included:

  • Fab location
  • Assembly location
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Export classification

*For reference only

  • US ECCN: 5A991B1

Packaging information

Package | Pins HVQFP (RCP) | 64
Operating temperature range (°C) -40 to 85
Package qty | Carrier 160 | JEDEC TRAY (10+1)

Features for the TLK1211

  • 0.6-Gbps to 1.3-Gbps Serializer/Deserializer
  • Low Power Consumption <250 mW (typ) at 1.25 Gbps
  • Fast Relock Times Less Than 256 ns (Typ) Suitable
    for EPON/GEPON Applications
  • LVPECL Compatible Differential I/O on High Speed Interface
  • Single Monolithic PLL Design
  • Support For 10-Bit Interface or Reduced Interface 5-Bit DDR
    (Double Data Rate) Clocking
  • Receiver Differential Input Thresholds 200 mV Minimum
  • IEEE 802.3 Gigabit Ethernet Compliant
  • ANSI X3.230-1994 (FC-PH) Fibre Channel Compliant
  • Advanced 0.25-µm CMOS Technology
  • No External Filter Capacitors Required
  • Comprehensive Suite of Built-In Testability
  • IEEE 1149.1 JTAG Support
  • 2.5-V Supply Voltage for Lowest Power Operation
  • 3.3-V Tolerant on LVTTL Inputs
  • Hot Plug Protection
  • 64-Pin VQFP With Thermally Enhanced Package (PowerPAD)
  • CPRI Data Rate Compatible (614 Mbps, 1.22 Gbps)
  • Industrial Temperature Range Supported: –40°C to 85°C

PowerPAD Is a trademark of Texas Instruments

Description for the TLK1211

The TLK1211RCP gigabit ethernet transceiver provides for ultrahigh-speed, full-duplex, point-to-point data transmissions. This device is based on the timing requirements of the 10-bit interface specification by the IEEE 802.3 gigabit ethernet specification and is also compliant with the ANSI X3.230-1994 (FC-PH) fibre channel standard. The device supports data rates from 0.6 Gbps to 1.3 Gbps.

The primary application of the transceiver is to provide building blocks for point-to-point baseband data transmission over controlled impedance media of 50 Ω. The transmission media can be printed-circuit board traces, copper cables, or fiber-optical media. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The transceiver performs the data serialization, deserialization, and clock extraction functions for a physical layer interface device. The transceiver operates at 1.25 Gbps (typical), providing up to 1 Gbps of data bandwidth over a copper or optical media interface.

The transceiver supports both the defined 10-bit interface (TBI) and a reduced 5-bit interface utilizing double data rate (DDR) clocking. In the TBI mode the serializer/deserializer (SERDES) accepts 10-bit wide 8b/10b parallel encoded data bytes. The parallel data bytes are serialized and transmitted differentially at PECL compatible voltage levels. The SERDES extracts clock information from the input serial stream and deserializes the data, outputting a parallel 10-bit data byte.

In the DDR mode the parallel interface accepts 5-bit wide 8b/10b encoded data aligned on both the rising and falling edges of the reference clock. The data is clocked most significant bit first (bits 0–4 of the 8b/10b encoded data) on the rising edge of the clock and the least significant bits (bits 5–9 of the 8b/10b encoded data) are clocked on the falling edge of the clock.

The transceiver provides a comprehensive series of built-in tests for self-test purposes including loopback and pseudorandom binary sequence (PRBS) generation and verification. An IEEE 1149.1 JTAG port is also supported.

The transceiver is housed in a high-performance, thermally enhanced, 64-pin VQFP PowerPAD package. Use of the PowerPAD package does not require any special considerations except to note that the PowerPAD, which is an exposed die pad on the bottom of the device, is a metallic thermal and electrical conductor. It is recommended that the device PowerPAD be soldered to the thermal land on the board.

The transceiver is characterized for operation from –40°C to 85°C.

The transceiver uses a 2.5-V supply. The I/O section is 3.3-V compatible. With a 2.5-V supply the chipset is very power-efficient, dissipating less than 250 mW typical power when operating at 1.25 Gbps.

The transceiver is designed to be hot plug capable. A power-on reset causes RBC0, RBC1, the parallel output signal terminals, TXP, and TXN to be held in a high-impedance state.

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Carrier options

You can choose different carrier options based on the quantity of parts, including full reel, custom reel, cut tape, tube or tray.

A custom reel is a continuous length of cut tape from one reel to maintain lot- and date-code traceability, built to the exact quantity requested. Following industry standards, a brass shim connects an 18-inch leader and trailer on both sides of the cut tape for direct feeding into automated assembly machines. TI includes a reeling fee for custom reel orders.

Cut tape is a length of tape cut from a reel. TI may fulfill orders using multiple strips of cut tapes or boxes to satisfy the quantity requested.

TI often ships tube or tray devices inside a box or in the tube or tray, depending on inventory availability. We pack all tapes, tubes or sample boxes according to internal electrostatic discharge and moisture-sensitivity-level protection requirements.

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Lot and date code selection may be available

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