Device temperature grade 1: –40°C to +125°C ambient operating temperature
Device HBM ESD classification level 2
Device CDM ESD classification level C7B
Designed for high performance:
Nano supply current : 120 nA (Typ)
High accuracy: ±0.5% (Typ)
Built-in hysteresis (VHYS): 5% (Typ)
Fixed threshold voltage (VIT-): 0.8 V to 5.4 V
Designed for a wide range of applications:
Operating voltage range : 0.7 V to 6 V
Fixed (VIT-) voltage: 0.8 V to 5.4 V in 0.1 V steps
Programmable reset time delay (tD)
Min time delay: 40 µs (typ) without capacitor
Active-low manual reset (MR)
Multiple output topologies / Package type:
Four output topologies (RESET / RESET):
TLV840MADL-Q1: open-drain, active-low
TLV840MAPL-Q1: push-pull, active-low
TLV840MADH-Q1: open-drain, active-high
TLV840MAPH-Q1: push-pull, active-high
Package: SOT23-5 (DBV)
Description for the TLV840-Q1
The TLV840-Q1 device is a voltage supervisor or reset IC that can operate at wide input voltage levels from 0.7 V to 6 V while maintaining very low quiescent current across the whole VDD and temperature range. TLV840-Q1 offers the best combination of low power consumption, high accuracy and low propagation delay (tp_HL= 30 µs typical).
Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VHYS) and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between the CT pin and ground. For a minimum reset delay time the CT pin can be left floating. The TLV840-Q1, with its manual reset pin (MR), offers program flexibility by forcing the system into a hard reset when the pin is asserted.
Additional features: Low power-on reset voltage (VPOR), built-in glitch immunity protection for VDD, built-in hysteresis, low open-drain output leakage current (Ilkg(OD)). TLV840-Q1 is a perfect voltage monitoring solution for automotive applications and battery-powered / low-power applications.
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