TMDSEMU560V2STM-U

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TMDSEMU560V2STM-U

XDS560v2 System Trace USB Debug Probe

Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity microcontrollers.

The XDS560v2 is the first of the XDS560 family of debug probes to provide System Trace (STM) capability, a type of Trace that monitors the entire device by capturing system events such as the state of processing cores, internal buses and peripherals. Most XDS560v2 models feature also System Pin Trace, a mode where the System Trace data is sent to an external memory buffer (128MB) inside the XDS560v2 to allow capturing larger number of system events. The System Pin Trace data connection requires additional wiring to the JTAG connector.

The XDS560v2 PRO TRACE is the second generation of the XDS560 family of debug probes to feature Core Pin Trace (Instruction and Data), a type of Trace that captures all instructions executed by a core and sends them to an external memory buffer (1GB) inside the XDS560v2 PRO TRACE. The Core Pin Trace does not intrude in the real-time behaviour of the system and allows capturing a larger number of instructions. The Core Pin Trace data connection requires additional wiring to the JTAG connector.

To accommodate for all types of Pin Trace (Instruction and System), all XDS560v2 variants feature a standard 60-pin MIPI HSPT connector as the primary JTAG connectivity to the target. In addition to that, all variants also feature modular target adapters for TI and ARM standard JTAG connectors (the offer of adapters varies per model).

The XDS560v2 supports the traditional IEEE1149.1 (JTAG) emulation as well as IEEE1149.7 (cJTAG) and operates with JTAG interface levels from +1.2V to +4.1V.

Compact JTAG (cJTAG) is a major improvement over the traditional JTAG, as it supports all its features while using only two pins, and is available in selected TI wireless connectivity microcontrollers.

All XDS560v2 models support either USB2.0 High speed (480Mbps) or Ethernet 10/100Mbps, with some models supporting both. Also, some models support PoE (Power over Ethernet) for added flexibility.

The XDS560v2 System Trace unit is fully compatible with TI’s Code Composer Studio IDE. This combination gives a complete hardware development environment which includes an Integrated Debug Environment, Compiler, and full hardware debugging and Trace capability (on selected devices) of TI microcontrollers, processors and wireless connectivity microcontrollers.

Other XDS products:

Texas Instruments  TMDSEMU560V2STM-U

The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The XDS560v2 System Trace adds system pin trace in its large external memory buffer. Available for selected TI devices, this external memory buffer captures device-level information that allows obtaining accurate bus performance activity and throughput, as well as power management of core and peripherals. Also, all XDS debug probes support Core and System Trace in all ARM and DSP processors that feature an Embedded Trace Buffer (ETB).

The Blackhawk XDS560v2 System Trace connects to the target board via a MIPI HSPT 60-pin connector (with multiple adapters for TI 14-pin, TI 20-pin and ARM 20 pin) and to the host PC via USB2.0 High speed (480Mbps). 

The Blackhawk XDS560v2 System Trace comes in a package consisting of:

  • XDS560v2 System Trace debug pod
  • MIPI HSPT 60-pin to TI 14-pin converter adapter
  • MIPI HSPT 60-pin to TI 20-pin converter adapter
  • MIPI HSPT 60-pin to ARM 20-pin converter adapter
  • USB2.0 cable
  • CDROM with device drivers
  • Quick Start guide
  • Warranty and product registration information

Devices supported:

  • Basic JTAG debug supports most TI microcontrollers (except MSP430), all wireless MCUs, most DSPs (except C54x, C62x, C67x) and all ARM processors
  • cJTAG debug supports all CC26xx, CC2538 and CC13xx devices
  • System pin trace is available for devices that are system trace enabled such as AM335x, AM437x, 66AK2x, C66x, DM81x, AM38x
  • Core and System trace are available via the ETB in selected ARM and DSP processors
  • For more information on the trace capabilities of a particular device please refer to its technical reference manual (TRM)

You will need:

  • A host PC that matches the minimum requirements of the Code Composer Studio IDE
  • A target board that features one of the compatible JTAG headers

You may need:

  • An adapter to allow connecting to target boards that features different JTAG headers

Shipping information:

  • Product box dimensions: 280mm x 210mm x 51mm (11in x 8.0in x 2.0in)
  • Packaged product weight: 450g (1.0lb)