The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuitinitialization and timing supervision, primarily fordigitalsignal processors (DSP) and processor-based systems.
During power-on, RESET is asserted when the supply voltageVDD becomes higher than 1.1 V. Thereafter, the supervisory circuit monitorsVDD and keeps the RESET output active as long asVDD remains below the threshold voltage of VIT. Aninternal timer delays the return of the output to the inactive state (high) to ensure proper systemreset. The delay time starts after VDDrises above the thresholdvoltage VIT.
When CT is connected to GND, a fixed delay time oftypically 10 msis asserted. When connected to VDD, the delay time is typically 200 ms. Whenthe supply voltage drops below the threshold voltage VIT, the output becomesactive (low) again. All the devices of this family have a fixed-sense threshold voltage(VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESET output. The TPS3837 has an active-high, push-pull RESET, and theTPS3838 integrates an active-low, open-drain RESET output. The productspectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits areavailable in either a SOT23-5 or a2-mm× 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operationover a temperature range of –40°C to 85°C.