Packaging information
| Package | Pins NFBGA (NMA) | 98 |
| Operating temperature range (°C) -40 to 85 |
| Package qty | Carrier 2,500 | LARGE T&R |
Features for the TPS65911
- Embedded Power Controller (EPC) With EEPROM Programmability
- Two Efficient Step-Down DC-DC Converters for Processor Cores (VDD1, VDD2)
- One Efficient Step-Down DC-DC Converter for I/O Power (VIO)
- One Controller for External FETs (VDDCtrl)
- Dynamic Voltage Scaling (DVS) for Processor Cores
- Eight LDO Voltage Regulators and One RTC LDO (Supply for Internal RTC)
- One High-Speed I2C Interface for General-Purpose Control Commands (CTL-I2C)
- Two Independent Enable Signals for Controlling Power Resources (EN1,
EN2)
- Alternatively, the EN1 and EN2 Pins can be Used as a High-Speed I2C Interface Dedicated for Voltage Scaling for VDD1 and VDD2
- Thermal Shutdown Protection and Hot-Die Detection
- A Real-Time Clock (RTC) Resource With:
- Oscillator for 32.768-kHz Crystal or 32-kHz Built-in RC Oscillator
- Date, Time, and Calendar
- Alarm Capability
- Nine Configurable GPIOs With Multiplexed Feature
Support:
- Four can be Used as Enable for External Resources, Included in Power-Up Sequence and Controlled by State Machine
- As GPI, GPIOs Support Logic-Level Detection and can Generate Maskable Interrupt for Wakeup
- Two of the GPIOs Have 10-mA Current Sink Capability for Driving LEDs
- DC-DC Converters Switching Synchronization Through an External 3-MHz Clock
- Two Reset Inputs:
- Cold Reset (HDRST)
- Power Initialization Reset (PWRDN) for Thermal Reset Input
- 32-kHz Clock and Reset (NRESPWRON) for System and an Additional Output for Reset Signal
- Watchdog
- Two ON and OFF LED Pulse Generators and One PWM Generator
- Two Comparators for System Control, Connected to VCCS Pin
- A JTAG and Boundary Scan (Not Accessible in Functional Mode [Test Purpose])
Description for the TPS65911
The TPS65911 device is an integrated power management IC (PMIC) available in a 98-pin 0.65-mm pitch BGA package. The TPS65911 device is dedicated to applications powered by one Li-Ion or Li-Ion polymer battery cell, 3-series Ni-MH cells, or a 5-V input, and applications that require multiple power rails. The device provides three step-down converters, one controller for external FETs to support high current rail, eight LDOs, and the device is designed to be a flexible PMIC for supporting different processors and applications.
Two of the step-down converters provide power for dual processor cores and support dynamic voltage scaling by a dedicated I2C interface for optimum power savings. The third converter provides power for the I/Os and memory in the system.
The device includes eight general-purpose LDO regulators that provide a wide range of voltage and current capabilities. Five of the LDO regulators support 1 to 3.3 V with a 100-mV step and three (LDO1, LDO2, LDO4) support 1.0 to 3.3 V with a 50-mV step. All LDO regulators are fully controllable by the I2C interface.
In addition to the power resources, the device contains an EPC to manage the power sequencing requirements of systems and an RTC. Power sequencing is programmable by EEPROM.