Packaging information
| Package | Pins VQFN (RHB) | 32 |
| Operating temperature range (°C) -40 to 110 |
| Package qty | Carrier 3,000 | LARGE T&R |
Features for the TRF7964A
- Completely Integrated Protocol Handling for ISO/IEC 15693, ISO/IEC 18000-3, ISO/IEC 14443 A and B, and FeliCa™
- Integrated State Machine for ISO/IEC 14443 A Anticollision (Broken Bytes) Operation
- Input Voltage Range: 2.7 VDC to 5.5 VDC
- Programmable Output Power: +20 dBm (100 mW), +23 dBm (200 mW)
- Programmable I/O Voltage Levels From 1.8 VDC to 5.5 VDC
- Programmable System Clock Frequency Output (RF, RF/2, RF/4) from 13.56-MHz or 27.12-MHz Crystal or Oscillator
- Integrated Voltage Regulator Output for Other System Components (MCU, Peripherals, Indicators), 20 mA (Max)
- Programmable Modulation Depth
- Dual Receiver Architecture With RSSI for Elimination of "Read Holes" and Adjacent Reader System or Ambient In-Band Noise Detection
- Programmable Power Modes for Ultra Low-Power System Design (Power Down <1 µA)
- Parallel or SPI Interface (With 127-Byte FIFO)
- Temperature Range: –40°C to 110°C
- 32-Pin QFN Package (5 mm × 5 mm)
Description for the TRF7964A
The TRF7964A device is an integrated analog front end (AFE) and multiprotocol data-framing device for a 13.56-MHz NFC/RFID reader and writer system supporting ISO/IEC 14443 A and B, Sony FeliCa, and ISO/IEC 15693. Pin-to-pin and firmware compatible with the superset device TRF7970A. Built-in programming options make the device suitable for a wide range of applications for proximity and vicinity identification systems.
The device is configured by selecting the desired protocol in the control registers. Direct access to all control registers allows fine tuning of various reader parameters as needed.
The TRF7964A device supports data rates up to 848 kbps with all framing and synchronization tasks for the ISO protocols onboard. Other standards and even custom protocols can be implemented by using one of the direct modes the device offers. These direct modes let the user fully control the AFE and also gain access to the raw subcarrier data or the unframed, but already ISO-formatted, data and the associated (extracted) clock signal.
The receiver system has a dual-input receiver architecture to maximize communication robustness. The receivers also include various automatic and manual gain control options. The received signal strength from transponders, ambient sources, or internal levels is available in the RSSI register.
A SPI or parallel interface can be used for the communication between the MCU and the TRF7964A device. When the built-in hardware encoders and decoders are used, transmit and receive functions use a 127-byte FIFO register. For direct transmit or receive functions, the encoders or decoders can be bypassed so the MCU can process the data in real time.
The TRF7964A device supports a wide supply voltage range of 2.7 V to 5.5 V and data communication levels from 1.8 V to 5.5 V for the MCU I/O interface.
The transmitter has selectable output power levels of 100 mW (+20 dBm) or 200 mW (+23 dBm) equivalent into a 50-Ω load when using a 5-V supply and supports OOK and ASK modulation with selectable modulation depth.
The built-in programmable auxiliary voltage regulator delivers up to 20 mA to supply an MCU and additional external circuits within the reader system.
Start evaluating the TRF7964A multiprotocol transceiver IC with the DLP-7970ABP of the superset device.