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UCC21220AD

4-A, 6-A, 3.0-kVRMS isolated dual-channel gate driver

Packaging

Package | PIN: SOIC (D) | 16
Temp: Q (-40 to 125)
Carrier: Partial Tube
Qty Price
1-9 $4.58
10-24 $4.13
25-99 $3.84
100-249 $3.37
250-499 $3.16
500-749 $2.68
750-999 $2.26
1000+ $2.16

Features

  • Supports basic and functional isolation
  • CMTI greater than 100-V/ns
  • 4-A peak source, 6-A peak sink output
  • Switching parameters:
    • 40-ns maximum propagation delay
    • 5-ns maximum delaymatching
    • 5.5-ns maximum pulse-width distortion
    • 35-µs maximum VDD power-updelay
  • Up to 18-V VDD output drive supply
    • 5-V and 8-V VDD UVLO Options
  • Operating temp. range (TA) –40°C to 125°C
  • Narrow body SOIC-16 (D) package
  • Rejects input pulses shorter than 5-ns
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242-VPK isolation per DIN V VDE V 0884-11:2017-01 andDIN EN 61010-1 (planned)
    • 3000-VRMS isolation for 1minute per UL 1577
    • CQC certification per GB4943.1-2011(planned)

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Texas Instruments  UCC21220AD

The UCC21220 and UCC21220A devices arebasic and functional isolated dual-channel gate drivers with 4-A peak-source and 6-A peak-sink current. They are designed to drive power MOSFETs andGaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switchingperformance and robust ground bounce protection through greater than 100-V/ns common-mode transientimmunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, orhalf-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drivestrength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include: DIS pin shuts down both outputs simultaneously when it isset high; INA/B pin rejects input transient shorter than 5-ns; both inputs and outputs canwithstand –2-V spikes for 200-ns, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2.1-V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, androbustness in a wide variety of power applications.