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UCD90240 Power Sequencer and System Manager EVM with Margining



  • 32 user-configurable pull-up/pull-down signals to configure GPI inputs or open-drain GPO output
  • 84 LEDs to monitor GPIO, Logic GPO, EN, and MARGIN outputs
  • Strip connector I/O access  
  • On-board TPS54678 POL converter for margining test
  • Supported by Fusion Digital Power Designer 2.0.xx or higher

Texas Instruments  UCD90240EVM

The UCD90240EVM-704 contains a UCD90240 sequencer device and a step-down power stage using the TPS54678 synchronous step-down switcher with integrated FET (SWIFT™). Access to all of the I/O pins is provided via strip connectors for integration into complex systems using jumper wires. The UCD90240EVM provides a PMBus (power management bus) communication port. Microsoft® Windows® based host computers can monitor, control and configure the UCD90240 device using a USB interface adapter EVM (HPA172) and TI Fusion Digital Power Designer graphical user interface (GUI). The power stage using the TPS54678 synchronous step-down switcher (5-V input, 1.2-V output) is provided to assist evaluation of the UCD90240’s margining function.