|Package | PIN:||RHB | 32|
|Temp:||I (-40 to 85)|
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 3: –40°C to 85°C Ambient Operating TemperatureRange
- Device HBM ESD Classification Level 2
- Device CDM ESDClassification Level C6
- Stereo Audio DAC
- 102-dBASignal-to-Noise Ratio
- 16-, 20-, 24-, or 32-BitData
- Supports Sample Rates From 8 kHz to 96 kHz
- 3D, Bass,Treble, EQ, De-Emphasis Effects
- Flexible Power Saving Modes and Performance areAvailable
- Stereo Audio ADC
- 92-dBA Signal-to-NoiseRatio
- Supports Sample Rates From 8 kHz to 96 kHz
- DigitalSignal Processing and Noise Filtering Available During Record
- Six Audio Input Pins
- One Stereo Pair of Single-EndedInputs
- One Stereo Pair of Fully DifferentialInputs
- Six Audio Output Drivers
- Fully Differential or Single-EndedStereo Headphone Drivers
- Fully Differential Stereo LineOutputs
- Low Power: 14-mW Stereo 48-kHz Playback With 3.3-V Analog Supply
- Ultralow-Power Mode with Passive Analog Bypass
- Programmable Input/Output Analog Gains
- Automatic Gain Control (AGC) for Record
- Programmable Microphone Bias Level
- Programmable PLL for Flexible Clock Generation
- I2C Control Bus
- Audio Serial Data Bus Supports I2S, Left/Right-Justified, DSP, and TDM Modes
- Extensive Modular Power Control
- Power Supplies:
- Analog: 2.7 V to 3.6V
- Digital Core: 1.525 V to 1.95 V
- Digital I/O: 1.1 V to 3.6V
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Texas Instruments 6PAIC3104IRHBRQ1
The TLV320AIC3104-Q1 is a low-power stereo audio codec with stereo headphone amplifiers,as well as multiple inputs and outputs that are programmable in single-ended or fully differentialconfigurations. Extensive register-based power control is included, enabling stereo 48-kHz DACplayback as low as 14 mW from a 3.3-V analog supply, making it ideal for car audio applications incluster and head unit systems.
The record path of the TLV320AIC3104-Q1 contains integrated microphone bias, digitallycontrolled stereo microphone preamplifier, and automatic gain control (AGC), with mix/muxcapability among the multiple analog inputs. Programmable filters are available during record whichcan remove audible noise that can occur during noisy and unpredictable environments, such as whenan e-call system is activated. The playback path includes mix/mux capability from the stereo DACand selected inputs, through programmable volume controls, to the various outputs.
The TLV320AIC3104-Q1 contains four high-power output drivers as well as two fullydifferential output drivers. The high-power output drivers are capable of driving a variety of loadconfigurations, including up to four channels of single-ended 16-Ω headphones using AC-couplingcapacitors, or stereo 16-Ω headphones in a capless output configuration. These parameters enablethe TLV320AIC3104-Q1 to act as an interface between the MCU and speaker amplifiers, such as theTPA3111D1-Q1, in various audio applications in theinfotainment and cluster fields.
The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includesprogrammable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speakerequalization, and de-emphasis for 32-kHz,
44.1-kHz, and 48-kHz sample rates. The stereo audio ADC supports sampling rates from 8 kHz to96 kHz and is preceded by programmable gain amplifiers (PGA) or an automatic gain control (AGC)circuit that can provide up to 59.5-dB analog gain for low-level microphone inputs. TheTLV320AIC3104-Q1 provides an extremely high range of programmability for both attack (8 ms to 1,408ms) and for decay (0.05 s to 22.4 s). This extended AGC range allows the AGC to be tuned for manytypes of applications.
Where neither analog nor digital signal processing are required, the device can be put ina special analog signal passthrough mode. This mode significantly reduces power consumption, asmost of the device is powered down during this passthrough operation.
The serial control bus supports the I2C protocol, whereas theserial audio data bus is programmable for I2S, left/right-justified,DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and supportfor all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz,with special attention paid to the most-popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and19.68-MHz system clocks.
The TLV320AIC3104-Q1 operates from an analog supply of 2.7 V to 3.6 V, adigital core supply of 1.525 V to 1.95 V, and a digital I/O supply of 1.1 V to 3.6 V.