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74ALVCH32501ZKFR

36-Bit Universal Bus Transceiver with 3-State Outputs

Packaging

Package | PIN: ZKF | 114
Temp: I (-40 to 85)
Carrier: Cut Tape
Qty Price
1-9 $6.65
10-24 $5.98
25-99 $5.59
100-249 $5.01
250-499 $4.68
500-749 $4.07
750-999 $3.52
1000+ $3.45

Features

  • Member of the Texas Instruments Widebus+™ Family
  • UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode
  • Operates From 1.65 V to 3.6 V
  • Max tpd of 3.9 ns at 3.3 V
  • ±24 mA Output Drive at 3.3 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus+, UBT are trademarks of Texas Instruments.

Texas Instruments  74ALVCH32501ZKFR

This 36-bit universal bus transceiver is designed for 1.65-V to 3.6-V VCC operation.

This device can be used as two 18-bit transceivers or one 36-bit transceiver. Data flow in each direction is controlled by output-enable (OEAB and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B, but uses OEBA\, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and OEBA\ is active low).

To ensure the high-impedance state during power up or power down, OEBA\ should be tied to VCC through a pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.