|Package | PIN:||RGE | 24|
|Temp:||Q (-40 to 125)|
- Resolution: 18-Bits
- High Sample Rate With No Latency Output:
- ADS8910B: 1-MSPS
- ADS8914B: 250-kSPS
- Integrated LDO Enables Single-Supply Operation
- Low-Power Reference Buffer With No Droop
- Excellent AC and DC Performance:
- SNR: 102.5-dB, THD: –125-dB
- DNL: ±0.2-LSB, 18-BitNo-Missing-Codes
- Wide Input Range:
- Unipolar Differential Input Range:±VREF
- VREF Input Range: 2.5-V to5-V
- Single-Supply, Low-Power Operation
(Includes Internal Reference Buffer and LDO)
- ADS8910B : 21-mW at 1-MSPS
- ADS8912B : 16-mW at500-kSPS
- ADS8914B : 14-mW at 250-kSPS
- Enhanced-SPI Digital Interface
- Interface SCLK: 20-MHz at 1-MSPS
- Configurable DataParity Output
- Extended Temperature Range: –40°C to +125°C
- Small Footprint: 4-mm × 4-mm VQFN
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Texas Instruments ADS8912BRGER
The ADS8910B, ADS8912B, and ADS8914B (ADS891xB) belong to a family ofpin-to-pin compatible, high-speed, single-channel, high-precision, 18-bit successive approximationregister (SAR) analog-to-digital convertors (ADCs) with an integrated reference buffer andintegrated low-dropout regulator (LDO). The device family includes the ADS890xB (20-bit) andADS892xB (16-bit) resolution variants.
The ADS891xB boost analog performancewhile maintaining high-resolution data transfer by using TI’s enhanced-SPI feature. Enhanced-SPIenables the ADS89xxB to achieve high throughput at lower clock speeds, thereby simplifying theboard layout and lowering system cost. Enhanced-SPI also simplifies clocking-in of data, therebymaking this device an excellent choice for applications involving FPGAs, DSPs. The ADS89xxB iscompatible with a standard SPI Interface.
The ADS891xB has an internal data parityfeature that can be appended to the ADC data output. ADC data validation by the host, using paritybits, improves system reliability.