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Quad-Channel Integrated Analog Front End for Automotive Radar


Package | PIN: RGC | 64
Temp: T (-40 to 105)
Carrier: Cut Tape
Qty Price
1-9 $29.00
10-24 $27.11
25-99 $26.26
100-249 $23.34
250-499 $23.17
500-749 $21.79
750-999 $19.56
1000+ $19.50


  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C AmbientOperating Temperature Range
    • Device HBM ESD ClassificationLevel 2
    • Device CDM ESD Classification Level C4B
  • Integrated Analog Front-End Includes:
    • Quad LNA, Equalizer, PGA, Antialiasing Filter, and ADC
  • Input-Referred Noise with 30-dB PGA Gain:
    • 2.9-nV/√Hz for 15-dB LNAGain
    • 2.0-nV/√Hz for 18-dB LNA Gain with HIGH_POW_LNAMode
  • Simultaneous Sampling Across Channels
  • Programmable LNA Gain:
    12 dB, 15 dB, 16.5 dB, and 18 dB
  • Programmable Equalizer Modes
  • Built-In Diagnostic Modes
  • Temperature Sensor
  • Programmable-Gain Amplifiers (PGAs):
    • 0 dB to 30 dB in 3-dBSteps
  • Programmable, Third-Order, Antialiasing Filter:
    • 7 MHz, 8 MHz, 10.5 MHz, and 12 MHz
  • Analog-to-Digital Converter (ADC):
    • Quad Channel, 12 Bits, 25 MSPS per Channel
    • NoExternal Decoupling Required for References
  • Parallel CMOS Outputs
  • 64-mW Total Core Power per Channel at
    25 MSPS per Channel
  • Supplies: 1.8 V and 3.3 V
  • Package: 9-mm × 9-mm VQFN-64

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Texas Instruments  AFE5401TRGCTQ1

The AFE5401-Q1 is an analog front-end (AFE), targeting applications where the level ofintegration is critical. The device includes four channels, with each channel comprising alow-noise amplifier (LNA), a programmable equalizer (EQ), a programmable gain amplifier (PGA), andan antialias filter followed by a high-speed, 12-bit, analog-to-digital converter (ADC) at 25 MSPSper channel.

Each of the four differential input pairs are amplified by an LNA and are followed by aPGA with a programmable gain range from 0 dB to 30 dB. An antialias, low-pass filter (LPF) is alsointegrated between the PGA and ADC for each channel.

Each LNA, PGA, and antialiasing filter output is differential (limited to 2VPP). The antialiasing filter drives the on-chip, 12-bit, 25-MSPS ADC. Thefour ADC outputs are multiplexed on a 12-bit, parallel, CMOS output bus.

The device is available in a 9-mm × 9-mm, VQFN-64 package and is specified over atemperature range of –40°C to +105°C. For more information,