CD4011UBM

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CD4011UBM

CMOS Quad 2-Input NAND Gate

Packaging

Package | PIN: D | 14
Temp: M (-55 to 125)
Carrier: Partial Tube
Qty Price
1-9 $0.40
10-24 $0.35
25-99 $0.32
100-249 $0.27
250-499 $0.25
500-749 $0.19
750-999 $0.15
1000+ $0.13

Features

  • Propagation delay time = 30 ns (typ). at CL = 50 pF, VDD = 10 V
  • Standardized symmetrical output characteristics
  • 100% tested for quiescent current at 20V
  • Maximum input current of 1 µA at 18 V over full package temperature range; 100nA at 18 V and 25°C
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B "Standard Specifications for Description of ’B’ Series CMOS Devices"

Data sheet acquired from Harris Semiconductor

Texas Instruments  CD4011UBM

CD4011UB quad 2-input NAND gate provides the system designer with direct implementation of the NAND function and supplements the existing family of CMOS gates.

The CD4011UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline package (M, MT, M96, NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).