|Package | PIN:||N | 16|
|Temp:||M (-55 to 125)|
- Internally synchronous for high internal and external speeds
- Logic edge-clocked design increments on positive Clock transition or on negative Clock inhibit transition.
- 100% tested for quiescent current at 20-V
- 5-V, 10-V, and 15-V parametric ratings
- Standard symmetrical output characteristics
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of B Series CMOS Devices"
- Frequency synthesizers
- Phase-locked loops
- Programmable down counters
- Programmable frequency dividers
NOT RECOMMENDED FOR NEW DESIGNS
Texas Instruments CD4522BE
CD4522B programmable BCD counter has a decoded "0" state output for divide-by-N applications. In single stage operation the "0" output is tied to the Preset Enable input. The Cascade Feedback allows multiple stage divide-by-N operation without the need for external gating. A HIGH on the Clock Inhibit disables the pulse-counting function. A HIGH on the Master Reset asynchronously resets the divide-by-N operation. The output is presented in BCD format.
The CD4522B-series types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).