CLVC8T245MRHLTEP

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CLVC8T245MRHLTEP

Enhanced Product 8-Bit Dual-Supply Bus Transc. w/ Configurable Voltage Transl., and 3-State Outputs

Packaging

Package | PIN: RHL | 24
Temp: M (-55 to 125)
Carrier: Cut Tape
Qty Price
1-9 $6.67
10-24 $6.00
25-99 $5.60
100-249 $5.02
250-499 $4.69
500-749 $4.08
750-999 $3.53
1000+ $3.46

Features

  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • VCC Isolation Feature – If Either VCC Input Is at GND, All Are in the High-Impedance State
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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Texas Instruments  CLVC8T245MRHLTEP

This 8-bit noninverting bus transceiver uses two separate configurable power-supplyrails. The SN74LVC8T245-EP is optimized to operate with VCCA andVCCB set at 1.65 V to 5.5 V. The A port is designed to trackVCCA. VCCA accepts any supply voltage from 1.65 V to5.5 V. The B port is designed to track VCCB. VCCBaccepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltagebidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.

The SN74LVC8T245-EP is designed for asynchronous communication between two data buses.The logic levels of the direction-control (DIR) input and the output-enable(OE) input activate either the B-port outputs or the A-port outputs or placeboth output ports into the high-impedance mode. The device transmits data from the A bus to the Bbus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputsare activated. The input circuitry on both A and B ports is always active and must have a logicHIGH or LOW level applied to prevent excess ICC andICCZ.

The SN74LVC8T245-EP is designed so that the control pins (DIR andOE) are supplied by VCCA.

This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if eitherVCC input is at GND, all outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down,OE should be tied to VCC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of thedriver.