CY74FCT821CTQCT

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CY74FCT821CTQCT

10-Bit Bus Interface Flip-Flops with 3-State Outputs

Packaging

Package | PIN: DBQ | 24
Temp: I (-40 to 85)
Carrier: Cut Tape
Qty Price
1-9 $1.21
10-24 $1.08
25-99 $1.00
100-249 $0.86
250-499 $0.79
500-749 $0.65
750-999 $0.52
1000+ $0.46

Features

  • Function, Pinout, and Drive Compatible With FCT, F Logic, and AM29821
  • Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • 64-mA Output Sink Current
    32-mA Output Source Current
  • High-Speed Parallel Register With Positive-Edge-Triggered D-Type Flip-Flops
  • 3-State Outputs

Texas Instruments  CY74FCT821CTQCT

This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a 10-bit-wide buffered version of the popular CY74FCT374 function. This device is ideal for use as an output port requiring high IOL/IOH.

This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.