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5 - 85 MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control Channel


Package | PIN: RHS | 48
Temp: S (-40 to 105)
Carrier: Cut Tape
Qty Price
1-9 $9.77
10-24 $9.08
25-99 $8.77
100-249 $7.66
250-499 $7.29
500-749 $6.71
750-999 $6.02
1000+ $6.00


  • Bidirectional Control Interface Channel Interface with
    I2C Compatible Serial Control Bus
  • Supports High Definition (720 p) Digital Video Format
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • Supports Two 10–bit Camera Video Streams
  • 5 – 85MHz PCLK Supported
  • Single 3.3 V Operation with 1.8 V or 3.3 V Compatible
    LVCMOS I/O Interface
  • AC-Coupled STP Interconnect Up to 10 Meters
  • Parallel LVCMOS Video Inputs
  • DC-Balanced and Scrambled Data with Embedded Clock
  • Supports Repeater Application
  • Internal Pattern Generation
  • Low Power Modes Minimize Power Dissipation
  • Automotive Grade Product: AEC-Q100 Grade 2 Qualified
  • >8kV HBM and ISO 10605 ESD Rating
  • Backward Compatible to FPD-Link II

Texas Instruments  DS90UB925QSQX/NOPB

The DS90UB925Q-Q1 serializer, in conjunction with the DS90UB926Q-Q1 deserializer, provides a complete digital interface for concurrent transmission of high-speed video, audio, and control data for automotive display and image sensing applications.

The chipset is ideally suited for automotive video-display systems with HD formats and automotive vision systems with megapixel resolutions. The DS90UB925Q-Q1 incorporates an embedded bidirectional control channel and low latency GPIO controls. This chipset translates a parallel interface into a single pair high-speed serialized interface. The serial bus scheme, FPD-Link III, supports full duplex of high-speed video data transmission and bidirectional control communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

The DS90UB925Q-Q1 serializer embeds the clock, DC scrambles & balances the data payload, and level shifts the signals to high-speed low voltage differential signaling. Up to 24 data bits are serialized along the video control signals.

Serial transmission is optimized by a user selectable de-emphasis. EMI is minimized by the use of low voltage differential signaling, data scrambling and randomization and spread spectrum clocking compatibility.