DS90UB954TRGZTQ1

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DS90UB954TRGZTQ1

Dual 2MP FPD-Link III Deserializer With CSI-2 Outputs for 2MP/60fps Cameras and RADAR

Packaging

Package | PIN: RGZ | 48
Temp: T (-40 to 105)
Carrier: Cut Tape
Qty Price
1-9 $11.79
10-24 $10.96
25-99 $10.57
100-249 $9.24
250-499 $8.79
500-749 $8.09
750-999 $7.26
1000+ $7.24

Features

  • AEC-Q100 Qualified for Automotive Applications
    • Device Temperature Grade 2: –40℃ to +105℃ Ambient Operating TemperatureRange
  • Dual Deserializer Hub Aggregates One or Two Active Sensors Over FPD-Link III Interface
  • Power-Over-Coax (PoC) Compatible Transceiver
  • MIPI DPHY Version 1.2 / CSI-2 Version 1.3 Compliant
    • CSI-2 Output Ports
    • Supports 1, 2, 3, 4 Data Lanes
    • CSI-2 Data Rate Scalable for400 Mbps / 800 Mbps / 1.5 Gbps / 1.6 Gbps each DataLane
    • Programmable Data Types
    • Four VirtualChannels
    • ECC and CRC Generation
  • Ultra-Low Data and Control Path Latency
  • Supports Single-Ended Coaxial or Shielded Twisted-Pair (STP) Cable
  • Adaptive Receive Equalization
  • I2C With Fast-Mode Plus up to 1 Mbps
  • Flexible GPIOs for Camera Synchronization and Diagnostics
  • Compatible With DS90UB935-Q1, DS90UB953-Q1, DS90UB933-Q1 and DS90UB913A-Q1 Serializers
  • Line Fault Detection and Advanced Diagnostics
  • ISO 10605 and IEC 61000-4-2 ESD Compliant

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Texas Instruments  DS90UB954TRGZTQ1

The DS90UB954-Q1 is a versatile dualdeserializer hub capable of receiving serializedsensor data from one or two independent sources throughan FPD-Link III interface. When paired with a DS90UB953-Q1serializer, the DS90UB954-Q1 receives data from imagers,supporting 2MP/60fps and 4MP/30fps cameras as well as satellite RADAR and other sensors such as ToFand LIDAR. Data is received and aggregated into a MIPI CSI-2 compliant output for interconnect to adownstream processor.For sensors withDS90UB933-Q1 and DS90UB913A-Q1 serializers, the DS90UB954-Q1receives and aggregates data from one or two sensors including Full HD 1080p 2MP 60/fps imagersensors. When configuring the CSI-2 interface for 2-lane operation, a duplicate MIPI CSI-2clock lane is available to provide a replicated output. Replication mode creates two copies ofthe aggregated video stream for data logging and parallelprocessing.

The DS90UB954-Q1 and partner DS90UB953-Q1 chipset is AEC-Q100 qualified anddesigned to receive data across either 50-Ω single-ended coaxial or 100-Ω differential STP cables.The deserializer hub is ideal for Power-over-Coaxapplications and the receive equalizer automatically adapts to compensate for cable losscharacteristics with no additional programming required, including cable degradation overtime.

Each FPD-Link III interface includes a separate low latency bidirectional control channel(BCC) that continuously conveys I2C, GPIO, and other control information. GPIO signals purposed forsensor synchronization and diagnostic features also make use of the BCC.