|Package | PIN:||D | 8|
|Temp:||Q (-40 to 125)|
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
- Device HBM ESD Classification Level 3A
- Device CDM ESD Classification Level C6
- Isolated Bidirectional, I2C Compatible, Communication
- Supports up to 1-MHz Operation
- 3-V to 5.5-V Supply Range
- Open-Drain Outputs With 3.5-mA Side 1 and 35-mA Side 2 Sink Current Capability
- ±50-kV/µs Transient Immunity (Typical)
- Safety-Related Certifications:
- 4242-VPK Isolation per DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
- 2500-VRMS Isolation for 1 Minute per UL 1577
- CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 61010-1 End Equipment Standards
- CQC Basic Insulation per GB4943.1-2011
- UL 1577 Certification Complete; All Other Certifications Planned
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Texas Instruments ISO1541QDQ1
The ISO1540-Q1 and ISO1541-Q1 devices are low-power, bidirectional isolators that are compatible with I2C interfaces. These devices have logic input and output buffers that are separated by Texas Instruments Capacitive Isolation technology using a silicon dioxide (SiO2) barrier. When used with isolated power supplies, these devices block high voltages, isolate grounds, and prevent noise currents from entering the local ground and interfering with or damaging sensitive circuitry.
This isolation technology provides for function, performance, size, and power consumption advantages when compared to optocouplers. The ISO1540-Q1 and ISO1541-Q1 devices enable a complete isolated I2C interface to be implemented within a small form factor.
The ISO1540-Q1 has two isolated bidirectional channels for clock and data lines while the ISO1541-Q1 has a bidirectional data and a unidirectional clock channel. The ISO1541-Q1 is useful in applications that have a single master while the ISO1540-Q1 is suitable for multi-master applications. For applications where clock stretching by the slave is possible, the ISO1540-Q1 device should be used.
Isolated bidirectional communication is accomplished within these devices by offsetting the low-level output voltage on side 1 to a value greater than the high-level input voltage on side 1, thus preventing an internal logic latch that otherwise would occur with standard digital isolators.For all available packages, see the orderable addendum at the end of the data sheet.